M30W0R6500T0 - Multi-Chip Package
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4 Figure 2.
Logic Diagram .
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5 Table 1.
Signal Names .
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M30W0R6500T0 Features
* SUMMARY
* MULTI-CHIP PACKAGE
* 1 die of 64 Mbit (4Mb x 16) Flash Memory
* 1 die of 32 Mbit (2Mb x 16) Flash Memory SUPPLY VOLTAGE
* VDDF1 = VDDF2 = VDDQ = 1.7 to 2.2V
* VPP = 12V for fast Program (optional) LOW POWER CONSUMPTION ELECTRO
