M54HCT126 Datasheet (ST Microelectronics)

M54HCT126, QUAD BUS BUFFERS

The M54/74HCT125/126 are high speed CMOS QUAD BUS BUFFER (3-STATE) FABRICATED IN SILICON GATE C2MOS technology.

They have the same high speed performance of LSTTL combined with true CMOS low power consumption.

These devices require the same 3-STATE control input G to be taken high to make the output

M54/74HCT125 M54/74HCT126 QUAD BUS BUFFERS (3-STATE) .

HIGH SPEED tPD = 12 ns (TYP.) AT VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT 25 °C OUTPUT DRIVE CAPABILITY 15 LSTTL LOADS BALANCED PROPAGATION DELAYS tPLH = tPHL SYMMETRICAL OUTPUT IMPEDANCE IOL = IOH = 6 mA (MIN.) COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.) VIL = 0.8V (MAX) PIN AND FUNCTION COMPATIBLE WITH 54/74LS125/126 B1R (Plastic Package) F1R (Ceramic Package) M1R (Micro Package) C1R (Chip Carrier) DESCRIPT