MK5027 Datasheet (ST Microelectronics) - SS7 SIGNALLING LINK CONTROLLER

MK5027, SS7 SIGNALLING LINK CONTROLLER

The SGS-THOMSON Signalling System #7 Signalling Link Controller (MK5027) is a VLSI semiAugust 1989 DIP48 PLCC52 conductor device which provides a complete link control function conforming to the 1988 CCITT version of SS7.

This includes frame formatting, transparency (so called ”bit-stufling”), er

MK5027 SS7 SIGNALLING LINK CONTROLLER CMOS FULLY COMPATIBLE WITH BOTH 8 OR 16 BIT SYSTEMS SYSTEM CLOCK RATE TO 10MHz.

DATA RATE UP TO 2.5Mbps FOR SS7 PROTOCOL PROCESSING,7Mbps FOR TRANSPARENT HDLC MODE COMPLETE LEVEL 2 IMPLEMENTATION COMPATIBLE WITH 1988 CCITT, AT&T, ANSI, AND BELLCORE SIGNALLING SYSTEM NUMBER 7 LINK LEVEL PROTOCOLS 52 PIN PLCC AND 48-PIN DIP PIN-FOR-PIN COMPATIBLE WITH THE SGS-THOMSON X.25 CHIP (MK5025) AND NEARLY PIN-FORPIN COMPATIBLE WITH THE SGS-THOMSON VLANCE CHIP (MK5032)

MK5027 Features

* of the MK5027 is its buffer management which includes on-chip DMA. This feature allows users to handlq multiple packets of receive and transmit data at a time. (A conventional data linkcontrol chip plus a separate DMA chip would handle data for only a single block at a time.) The MK5027 may be used