74107 Datasheet (STMicroelectronics)

74107, DUAL J-K FLIP-FLOP

The M54/74HC107 is a high speed CMOS DUAL JK FLIP FLOP fabricated in silicon gate C2MOS technology.

It has the same high speed performance of LSTTL combined with true CMOS low power consumption.

These flip-flop are edge sensitive to the clock input and change state on the negative going transition o

M54HC107 M74HC107 DUAL J-K FLIP FLOP WITH CLEAR .

HIGH SPEED fMAX = 75 MHz (TYP.) AT VCC = 5 V LOW POWER DISSIPATION ICC = 2 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE IOH = IOL = 4 mA (MIN.) BALANCED PROPAGATION DELAYS tPLH = tPHL WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V TO 6 V PIN AND FUNCTION COMPATIBLE WITH 54/74LS107 B1R (Plastic Package) F1R (Ceramic Package) M1R (Mic