74V2T02 Datasheet - STMicroelectronics

74V2T02 DUAL 2-INPUT NOR GATE

The 74V2T02 is an advanced high-speed CMOS DUAL 2-INPUT NOR GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. The internal circuit is composed of 3 stages including buffer output, which provide high noise immunity and stable output. Power down protection i.

74V2T02 DUAL 2-INPUT NOR GATE HIGH SPEED: tPD = 5.1ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA = 25°C www.DataSheet4U.com s COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN), VIL = 0.8V (MAX) s POWER DOWN PROTECTION ON INPUTS s SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8mA (MIN) at VCC = 4.5V s BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL s OPERATING VOLTAGE RANGE: VCC(OPR) = 4.5V to 5.5V s IMPROVED LATCH-UP IMMUNITY s s SOT23-8L ORDER CODES PACKAGE SOT23-8L T&R 74V2T02STR DESC.

74V2T02 Datasheet (115.03 KB)