* a direct clear input CCLR and a count enable input CCKEN. For cascading, a ripple carry output RCO is provided. Expansion is easily accomplished by tying RCO of the first stage to CCKEN of the second stage, etc. Both the counter and register clocks are positive edge triggered. If the user wishes to
M74HC590 Datasheet (700.50 KB)
M74HC590
700.50 KB
8 binary counter register.
M74HC590
8 BINARY COUNTER REGISTER WITH 3 STATE OUTPUT
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HIGH SPEED: fMAX = 61 MHz (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC = .
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