M74HC126 Datasheet (STMicroelectronics)

M74HC126, Quad bus buffer

The M74HC126 is a high-speed CMOS quad buffer (3-state) fabricated with silicon gate C2MOS technology.

The device requires the 3-state control input, G, to be set high to place the output into high impedance state.

All inputs are equipped with protection circuits against static discharge and transie

M74HC126 Features

* High-speed: tPD = 8 ns (typ.) at VCC = 6 V

* Low power dissipation: ICC = 4 μA (max.) at TA = 25 °C

* High noise immunity: VNIH = VNIL = 28 % VCC (min)

* Symmetrical output impedance: |IOH| = IOL = 6 mA (min.)

* Balanced propagation delays: tPLH ≅ tPHL