SG3525 Datasheet | STMicroelectronics

SG2525A ® SG3525A REGULATING PULSE WIDTH MODULATORS . 8 TO 35 V OPERATION . 5.1 V REFERENCE TRIMMED TO ± 1 % . 100 Hz TO 500 KHz OSCILLATOR RANGE . SEPARATE OSCILLATOR SYNC TERMINAL . ADJUSTABLE DEADTIME CONTROL . INTERNAL SOFT-START . PULSE-BY-PULSE SHUTDOWN . INPUT UNDERVOLTAGE LOCKOUT WITH HYSTERESIS . LATCHING PWM TO PREVENT MULTIPLE PULSES . DUAL SOURCE/SINK OUTPUT DRIVERS DIP16 16(Narrow) DESCRIPTION The SG3525Aseries of pulse width modulator integrated circuits are designed to offer improved performance and lowered external parts count when used in designing all types of switching power supplies. The on-chip + 5.1 V reference is trimmed to ± 1 % and the input mon-mode range of the error amplifier includes the reference voltage eliminating external resistors. A sync input to the oscillator allows multiple units to be slaved or a single unit to be synchronized to an external system clock. A single resistor betweenthe CT andthe dischargeterminals provide a wide range of dead time ad- justment. Thesedevicesalso featurebuilt-insoft-startcircuitry with only an external timing capacitor required. A shutdownterminal controls both the soft-start circuity and the output stages, providing instantaneous turn off through the PWM latch with pulsed shutdown, as well as soft-start recycle with longer shutdown mands. These functions are also controlled by an undervoltagelockoutwhich keepsthe outputs off and the soft-start capacitor discharged for sub-normal input voltages. This lockout circuitry includesapproximately 500 m V of hysteresisfor jitterfree operation. Another feature of these PWM circuits is a latch following the parator. Once a PWM pulses has been terminated for any reason, the outputs will remain off for the duration of the period. The latch is reset with each clock pulse. The output stages are totem-pole designs capable of sourcing or sinking in excess of 200 m A. The SG3525Aoutputstage Features NOR logic, giving a LOW output for an OFF...