STM32MP255A Datasheet - STMicroelectronics

STM32MP255A MPU

STM32MP255A Features

* Includes ST state-of-the-art patented technology. Cores

* Up to 64-bit dual-core Arm® Cortex®-A35

* Up to 1.5 GHz

* 32-Kbyte I + 32-Kbyte D level 1 cache for each core

* 512-Kbyte unified level 2 cache

* Arm® NEON™ and Arm® TrustZone®

* 32-bit Arm® Cor

Datasheet Details

STM32MP255A

2.87 MB

Mpu.

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