* Includes ST state-of-the-art patented technology. Cores
* Up to 64-bit dual-core Arm® Cortex®-A35
* Up to 1.5 GHz
* 32-Kbyte I + 32-Kbyte D level 1 cache for each core
* 512-Kbyte unified level 2 cache
* Arm® NEON™ and Arm® TrustZone®
* 32-bit Arm® Cor
STM32MP255C Datasheet (2.88 MB)
STM32MP255C
2.88 MB
Mpu.
Prerelease product(s)
STM32MP251C/F STM32MP253C/F STM32MP255C/F STM32MP257C/F
Datasheet
Arm® based dual Cortex®-A35 1.5 GHz + Cortex®-M33 MPU, AI, 3D.
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