Description
PAD VDD VSS VLCD COM1, COM2 S1-S43 S46(DSP1) S44(DSP2) S47(ARI) S45(ALI) S48 (DSPOUT) S49-S53 (ARLO1-5) OSC CE CK Input Input Input Output Output Output Input Output Input Output Output Power Driver Supply Voltage Common output Segment output Segment output DSP input Segment output Analog input Segment output DSP output Segment output Analog output Oscillator Chip Enable Data Shift Clock I/O Name Operating Voltage Description For logic circuit (2.7V to 6.5V) 0 V (GND) Power supply for driving LC
Features
- Maximum 53 segment output for STATIC display Drive system:1/1 duty → 53 segments 1/2 duty → 104 segments 3-input pins for serial data transfer (CE, CK, DI ) 2-pin for 5-level AD converter (ARI, ALI) 2 display pins for direct displaying (DSP1, DSP2 ) INH pin for blinking out display
BLOCK DIAG RAM.
- S44 (DSP2) S46 (DSP1) S48 (DSP OUT) S49 - S53 (ARLO1 - ARLO5)
COM1
COM2
S1
VLCD Common Driver OSC Clock Gener.
S6A0035_Samsungsemiconductor.pdf
