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LC35256DT-10 Dual Control Pins: OE and CE 256K (32768-word X 8-bit) SRAM

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Description

Ordering number : EN5823 CMOS IC LC35256D-10, LC35256DM, DT-70/10 Dual Control Pins: OE and CE 256K (32768-word × 8-bit) SRAM Overview The LC35256D.

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Datasheet Specifications

Part number
LC35256DT-10
Manufacturer
Sanyo
File Size
108.58 KB
Datasheet
LC35256DT-10_SanyoSemiconDevice.pdf
Description
Dual Control Pins: OE and CE 256K (32768-word X 8-bit) SRAM

Features

* Supply voltage range: 2.7 to 5.5 V
* 5-V operation: 5.0 V±10%
* 3-V operation: 2.7 to 3.6 V
* Access times
* 5-V operation LC35256DM, DT-70: 70 ns (max) LC35256D, DM, DT-10: 100 ns (max)
* 3-V operation LC35256DM, DT-70: 200 ns (max) LC35256D, DM, DT

Applications

* must set WE high during the read cycle. 2. External circuits in the application must not apply reverse phase signals to the DOUT pins when those pins are in the output state. 3. The time tWP is the period when CE and WE are both low. It is defined as the time from the fall of WE to the rise of CE or

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