S-13D1 Datasheet - Seiko

S-13D1 HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR

S-13D1 Series www.sii-ic.com © Seiko Instruments Inc., 2012 SUPER-SMALL PACKAGE 2-CIRCUIT BUILT-IN DELAY FUNCTION HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR Rev.1.1_00 The S-13D1 Series, developed by using the CMOS technology, is a 2-channel positive voltage regulator IC which has low dropout voltage, high accuracy output voltage and low current consumption. A 0.22 μF small ceramic capacitor can be used, and the S-13D1 Series includes a load current protection circuit that preven.

S-13D1 Features

* 1.0 V to 3.6 V, selectable in 0.05 V step A ceramic capacitor of 0.22 μF or more can be used for the output capacitor.

* Input voltage: 1.5 V to 5.5 V

* High-accuracy output voltage: ±1.0% (1.0 V to 1.45 V output product :±15 mV)

* Dropout voltage: 80 mV typ. (2.8 V output pr

S-13D1_Seiko.pdf