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HYB514405BJL-70 - 1M x 4-Bit Dynamic RAM

This page provides the datasheet information for the HYB514405BJL-70, a member of the HYB 1M x 4-Bit Dynamic RAM family.

Description

EDO-DRAM (access time 50 ns) EDO-DRAM (access time 60 ns) EDO-DRAM (access time 70 ns) Low Power EDO-DRAM (access time 50 ns) Low Power EDO-DRAM (access time 60 ns) Low Power EDO-DRAM (access time 70 ns) Semiconductor Group 2 HYB 514405BJ/BJL-50/-60/-70 1M x 4 EDO - DRAM Pin Configuration (top

Features

  • 5 10 10.
  • ns ns ns ns ns CAS-before-RAS Counter Test Cycle CAS precharge time (CASbefore-RAS counter test cycle) tCPT 35.
  • 40.
  • 40.
  • ns Test Mode Write command setup time Write command hold time tWTS tWTH 10 10.
  • 10 10.
  • 10 10.
  • ns ns Capacitance TA = 0 to 70 ˚C; VCC = 5 V ± 10 %; f = 1 MHz Parameter Input capacitance (A0 to A9) Input capacitance (RAS.

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Datasheet Details

Part number HYB514405BJL-70
Manufacturer Siemens
File Size 1.33 MB
Description 1M x 4-Bit Dynamic RAM
Datasheet download datasheet HYB514405BJL-70 Datasheet
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Full PDF Text Transcription

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1M x 4-Bit Dynamic RAM (Hyper Page Mode (EDO) version) HYB 514405BJ/BJL-50/-60/-70 Preliminary Information • • • • 1 048 576 words by 4-bit organization 0 to 70 ˚C operating temperature Hyper Page Mode - EDO Performance: -50 -60 60 15 30 104 25 -70 70 20 35 124 30 ns ns ns ns ns tRAC tCAC tAA tRC tHPC RAS access time CAS access time Access time from address Read/Write cycle time Hyper page mode (EDO) cycle time 50 13 25 89 20 • • Single + 5 V (± 10 %) supply Low power dissipation max. 660 mW active (-50 version) max. 605 mW active (-60 version) max. 550 mW active (-70 version) Standby power dissipation: 11 mW max.standby (TTL) 5.5 mW max.standby (CMOS) 1.1 mW max.
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