HYM72V1620GS-50 Datasheet - Siemens

HYM72V1620GS-50 16M x 72-Bit Dynamic RAM Module

3.3V 50ns DRAM module 3.3V 60ns DRAM module 3.3V 50ns DRAM module 3.3V 60ns DRAM module HYM 72V1620/30GS-50 Vss HYM 72V1620/30GS-60 Vss Note: 1 = High Level ( Driver Output) , 0 = Low Level (Driver Output) for PDE active ( ground) . For PDE at a high level all PD terminal are in tri-state. Semic.

16M × 72-Bit Dynamic RAM Module (ECC - Module ) HYM 72V1620GS-50/-60 HYM 72V1630GS-50/-60 168 Pin JEDEC Standard, Buffered 8 Byte Dual In-Line Memory Module for PC main memory applications 1 bank 16M x 72 organisation Optimized for ECC applications Fast Page Mode Operation Performance:: -50 tRAC tCAC tAA tRC tPC RAS access time CAS access time Access time from address Read/Write cycle time Fast page mode cycle time 50 18 30 90 35 -60 60 20 35 110 40 ns ns ns ns ns

HYM72V1620GS-50_SiemensSemiconductorGroup.pdf