Datasheet Specifications
- Part number
- HYS72V8000GU-10
- Manufacturer
- Siemens
- File Size
- 68.84 KB
- Datasheet
- HYS72V8000GU-10_SiemensSemiconductorGroup.pdf
- Description
- 3.3V 8M x 64-Bit SDRAM Module 3.3V 8M x 72-Bit SDRAM Module
Description
3.3V 8M x 64-Bit SDRAM Module 3.3V 8M x 72-Bit SDRAM Module 168 pin unbuffered DIMM Modules HYS64V8000GU-10 HYS72V8000GU-10 * 168 Pin JEDEC.
Features
* tion time is measured between V ih and Vil. All AC measurements assume t T=1ns with the AC output load circuit shown. tCH 2.4 V CLOCK 0.4 V tCL tSETUP tHOLD tT + 1.4 V 50 Ohm INPUT 1.4V Z=50 Ohm I/O tAC tLZ tOH tAC 50 pF OUTPUT 1.4V tHZ fig.1 5. If clock rising time is lonApplications
* 1 bank 8M x 64, 8M x 72 organisation Optimized for byte-write non-parity or ECC applications Fully PC66 layout compatible JEDEC standard Synchronous DRAMs (SDRAM) Performance: -10 fCK tAC Max. Clock frequency Max. access time from clock 66 MHz @ CL=2 100 MHz @ CL=3 8 ns @ CL=2 7 ns @ CL=3HYS72V8000GU-10 Distributors
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