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82S115 Datasheet - Signetics

4096-BI1 BIPOLAR ROM

82S115 Features

* ORGANIZATION: 82S114 - 256 X 8 82S115 - 512 X 8

* ADDRESS ACCESS TIME - 60ns, MAXIMUM

* POWER DISSIPATION - 165pW/BIT, TYPICAL

* INPUT LOADING - (-100pA), MAXIMUM

* ON-CHIP ADDRESS DECODING

* ON-CHIP STORAGE LATCHES

* TRI-STATE OUTPUTS

82S115 General Description

The 82S 114 and 82S 115 are Schottky-clamped Read Only Memories, incorporating on-chip data output registers. They are Field-Programmable, which means that custom patterns are immediately available by following the fusing procedure given in this data sheet. The standard 82S114 and 82S115 are supplie.

82S115 Datasheet (258.02 KB)

Preview of 82S115 PDF

Datasheet Details

Part number:

82S115

Manufacturer:

Signetics

File Size:

258.02 KB

Description:

4096-bi1 bipolar rom.
!iinoOliC!i 82S114 I!I 2048-BIT BIPOLAR ROM (256x8 PROM) 4096-B11 BIPOLAR ROM (512x8 PROM) 82S115 - - - - - - - - - - - - 1 DIGITAL 8000 SERIES TTL.

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82S115 4096-BI1 BIPOLAR ROM Signetics

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