Description
!iI!!lDOliC!i 82S130 2048-BIT BIPOLAR 82S131 _ _ _ _ _ _ _ _P_ROG_RA_M_MA_BL_ER_OM_<5_12_X4_PR_OM *-I> APRIL 1975 DIGITAL 8000 SERIES TTL/MEMOR.
The 82S 130 (Open Collector Outputs) and the 82S 131 (Tri-State Outputs) are Bipolar 2048-Bit Read Only Memories, organized as 512 words by 4 bits per.
Features
* ORGANIZATION - 512 X 4
* ADDRESS ACCESS TIME: S82S130/131 - 70ns, MAXIMUM N82S130/131 - 50ns, MAXIMUM
* POWER DISSIPATION - 0.3mW/BIT TYPICAL
* INPUT LOADING: S82S130/131 - (-150MA) MAXIMUM N82S130/131 - (-100MA) MAXIMUM
* ONE CHIP ENABLE INPUT
* ON-
Applications
* PROTOTYPING/VOLUME PRODUCTION SEQUENTIAL CONTROLLERS MICROPROGRAMMING HARDWI RED ALGORITHMS CONTROL STORE RANDOM LOGIC CODE CONVE RSI ON
56
PIN CONFIGURATION
F PACKAGE
* 16 Vee
Ao 5
14 AS
13 eE
12 01
Ground 8
* F - eerdip
BLOCK DIAGRAM
SIGNETICS 2048-BIT BIPOLAR PROGRAMMABLE ROM (512 X
