Si53204 Datasheet - Silicon Laboratories

Si53204 Low Power Gen 1/2/3/4/5 Clock Buffer

Si53212/Si53208/Si53204 Data Sheet 12/8/4-Output PCI-Express Low Jitter, Low Power Gen 1/2/3/4/5 Clock Buffer The Si53212, Si53208, and Si53204 are the industry’s highest performance, low additive jitter, low power PCIe clock fanout buffer family that can source 12, 8, or 4 clock outputs. All differential clock outputs are compliant to PCIe Gen1/2/3/4/5 common clock and separate reference clock specifications. This family of buffers is spread spectrum tolerant to pass through a spread input clo.

Si53204 Features

* 12/8/4-output 100 MHz PCIe Gen1/2/3/4/5compliant clock fanout buffer

* Low additive jitter: 0.02 ps rms max, Gen 5

* Low-power, push-pull, HCSL compatible differential outputs

* 10 MHz to 200 MHz clock input

* Individual hardware control pins and I2C control

Si53204 Datasheet (868.87 KB)