SP9500 Datasheet | Sipex

DESCRIPTION … The SP9500 is a low power 12-Bit Digital-to-Analog Converter. It features 0.5 to 4.5V output swing when using +5volt supply. The converter uses a standard 3- wire serial interface patible with SPI™, QSPI™ and Microwire™. The output settling-time is specified at 7.5µs. The SP9500 is available in 8- pin 0.15" SOIC and DIP packages, specified over mercial and industrial temperature ranges. VREF DAC REGISTER LATCH DAC + - VOUT AGND SHIFT REGISTER CS DIN SCLK SP9500DS/04 SP9500 12-Bit, Voltage Output D/A Converter © Copyright 2000 Sipex Corporation ABSOLUTE MAXIMUM RATINGS These are stress ratings only and functional operation of the device at these or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. VDD - DGND -0.3V,+6.0V VREF DGND, VDD AGND DGND, V REF DIN DGND, VDD Power Dissipation Plastic DIP 375m W (derate 7m W/°C above +70°C) Small Outline 375m W (derate 7m W/˚C above +70˚C) SPECIFICATIONS (Typical at 25˚C; TMIN ≤ TA ≤ TMAX; VDD = +5V, DGND = 0V, VREF = +3.5V; AGND = +1.5V; CMOS logic level digital inputs; specifications apply to all grades unless otherwise noted.) PARAMETER DIGITAL INPUTS Logic Levels VIH VIL 2 Quad, Input Coding REFERENCE INPUTS VREF Voltage Range AGND Voltage Range Input Resistance ANALOG OUTPUT Gain - B, - K - A, - J Initial Offset Bipolar Voltage Range Output Current STATIC PERFORMANCE Resolution Integral Linearity - B, - K - A, - J...