MB9A110A - Microcontroller

Spansion

Datasheet Details

of Spansion data sheet designations are presented here to highlight their presence and definitions.

RM Cortex-M3 Core  Processor version: r2p1  Up to 40MHz Frequency Operation  Integrated Nested Vectored Interrupt Controller (NVIC): 1 NMI (non-maskable interrupt) and 48 peripheral interrupts and 16 priority levels  24-bit System timer (Sys Tick): System timer for OS task management.
On-chip Memories [Flash memory]  Up to 512 Kbyte  Read cycle: 0wait-cycle  Security function for code protection [SRAM] This Series contain a total of up to 32Kbyte on-chip SRAM. On-chip SRAM is compose.

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Published: Jul 23, 2016 |