TXMC633 Datasheet - TEWS

TXMC633 Reconfigurable FPGA

Initial issue Changes in the BCC firmware and also changes in the process description. Description of I/O Interface extended Alternative configurations SPI-Flash assembly. Supplementary description for clock generation. Date December 2014 April 2015 July 2015 May 2017 July 2018 TXMC633 User Manual.

The Embedded I/O Company TXMC633 Reconfigurable FPGA with 64 TTL I/O / 32 Differential I/O Lines Version 1.0 User Manual Issue 1.0.4 July 2018 TEWS TECHNOLOGIES GmbH Am Bahnhof 7 25469 Halstenbek, Germany Phone: +49 (0) 4101 4058 0 Fax: +49 (0) 4101 4058 19 e-mail: info@tews.com www.tews.com TXMC633-10R 64 TTL Front I/O and 64 direct FPGA I/O Lines, XC6SLX45T-2 Spartan-6 FPGA,128 MB DDR3 TXMC633-11R 32 Differential Front I/O and 64 direct FPGA I/O Lines, XC6SLX45T-2 Spartan-6 FPGA,128 MB DDR3 T.

TXMC633-TEWS.pdf