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TC74AC00FN - QUAD 2 - INPUT NAND GATE

This page provides the datasheet information for the TC74AC00FN, a member of the TC74AC00F QUAD 2 - INPUT NAND GATE family.

Datasheet Summary

Features

  • High speed: tpd = 3.8 ns (typ. ) at VCC = 5 V.
  • Low power dissipation: ICC = 4 µA (max) at Ta = 25°C.
  • High noise immunity: VNIH = VNIL = 28% VCC (min).
  • Symmetrical output impedance: |IOH| = IOL = 24 mA (min) Capability of driving 50 Ω transmission lines.
  • Balanced propagation delays: tpLH ∼.
  • tpHL.
  • Wide operating voltage range: VCC (opr) = 2 V to 5.5 V.
  • Pin and function compatible with 74F00 Note: xxxFN (JEDEC SOP) is not avai.

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Datasheet preview – TC74AC00FN

Datasheet Details

Part number TC74AC00FN
Manufacturer Toshiba Semiconductor
File Size 351.88 KB
Description QUAD 2 - INPUT NAND GATE
Datasheet download datasheet TC74AC00FN Datasheet
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Full PDF Text Transcription

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TC74AC00P/F/FN/FT TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74AC00P,TC74AC00F,TC74AC00FN,TC74AC00FT Quad 2-Input NAND Gate The TC74AC00 is an advanced high speed CMOS 2-INPUT NAND GATE fabricated with silicon gate and double-layer metal wiring C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The internal circuit is composed of 3 stages including buffer output, which provide high noise immunity and stable output. All inputs are equipped with protection circuits against static discharge or transient excess voltage. Features • High speed: tpd = 3.8 ns (typ.
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