TC59SM704AFT, TC59SM704 Datasheet - Toshiba

TC59SM704AFT (TC59SM704 - TC59SM716) SDRAM

TC59SM716AFT/AFTL is a CMOS synchronous dynamic random access memory organized as 2,097,152-words × 4 banks × 16 bits and TC59SM708AFT/AFTL is organized as 4,194,304 words × 4 banks × 8 bits and TC59SM704AFT/AFTL is organized as 8,388,608 words × 4 banks × 4 bits. Fully synchronous operations are re.

TC59SM704AFT Features

* PARAMETER -70 tCK Clock Cycle Time (min) 7 ns 42 ns 5.4 ns 57 ns 80 mA 100 mA 2 mA TC59SM716/M708/M704 -75 7.5 ns 45 ns 5.4 ns 65 ns 75 mA 95 mA 2 mA -80 8 ns 48 ns 6 ns 68 ns 70 mA 90 mA 2 mA tRAS Active to Precharge Command Period (min) tAC tRC Access Time from CLK (max) Ref/Active to Ref/Active

TC59SM704_Toshiba.pdf