TC59SM804BFTL Datasheet - Toshiba

TC59SM804BFTL (TC59SM804BFT - TC59SM816BFT) SDRAM

TC59SM816BFT/BFTL is a CMOS synchronous dynamic random access memory organized as 4,194,304-words × 4 banks × 16 bits and TC59SM808BFT/BFTL is organized as 8,388,608 words × 4 banks × 8 bits and The TC59SM804BFT/BFTL is organized as 16,777,216 words × 4 banks × 4 bits. Fully synchronous operations a.

TC59SM804BFTL Features

* PARAMETER -70 tCK tAC tRC Clock Cycle Time (min) Access Time from CLK (max) Ref/Active to Ref/Active Command Period (min) 7 ns 40 ns 5.4 ns 56 ns 80 mA 100 mA 3 mA TC59SM816/M808/M804 -75 7.5 ns 45 ns 5.4 ns 65 ns 75 mA 95 mA 3 mA -80 8 ns 48 ns 6 ns 68 ns 70 mA 90 mA 3 mA tRAS Active to Precharge

TC59SM804BFTL Datasheet (2.78 MB)