TC74HC40105AP Datasheet - Toshiba

TC74HC40105AP 4-Bit x 16 Word FIFO Register

(1) Writing data Data can be written into the FIFO whenever DIR is high and a low to high transition occurs on the SI pin. DIR will toggle momentarily until the data has been transferred to the second word register. SI must be toggled before the next 4-bit word can be written. The first and subseque.

TC74HC40105AP/AF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC40105AP, TC74HC40105AF 4 Bit × 16 Word FIFO Register The TC74HC40105A is a high speed CMOS 4 bit × 16 word first-in, first-out (FIFO) Strage Register fabricated with silicon gate C2MOS technology. It achieves the high speed operation while maintaining the CMOS low power dissipation. The device is capable of handling 16 four-bit words and it is possible to handle the input and output data at different shifting rate.

TC74HC40105AP Features

* High speed: fmax 25 MHz (typ.) at VCC = 5 V

* Low power dissipation: ICC = 4 μA (max) at Ta = 25°C

* High noise immunity: VNIH = VNIL = 28% VCC (min)

* Output drive capability: 10 LSTTL loads for DIR, DOR 15 LSTTL loads for Q0 to Q3

* Symmetrical output impe

TC74HC40105AP-Toshiba.pdf