VG4632321A Datasheet - Vanguard International Semiconductor

VG4632321A 524/288x32x2-Bit CMOS Synchronous Graphic RAM

Preliminary VG4632321A 524,288x32x2-Bit CMOS Synchronous Graphic RAM Table 1 shows the details for pin number, symbol, type, and description. Table 1. Pin Description of VG4632321A Input Clock: CLK is driven by the system clock. All SGRAM input signals are sampled on the positive edge of CLK. C.

VIS Overview Preliminary VG4632321A 524,288x32x2-Bit CMOS Synchronous Graphic RAM The VG4632321A SGRAM is a high-speed CMOS synchronous graphic RAM containing 32M bits. It is internally configured as a dual 512K x 32 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Each of the 512K x 32 bit bank is organized as 2048 rows by 256 columns by 32 bits. Read and write accesses to the SGRAM are burst oriented; accesses start at a selected .

VG4632321A Features

* the write per bit and the masked block write functions. By having a programmable Mode register and special mode register, the system can choose the best suitable modes to maximize its performance. These devices are well suited for applications requiring high memory bandwidth, and when combined with

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