Datasheet Details
| Part number | VSC6048 |
|---|---|
| Manufacturer | Vitesse Semiconductor |
| File Size | 204.97 KB |
| Description | High-Speed Octal Programmable Timing Generator |
| Datasheet |
 VSC6048_ETC.pdf
|
| Part number | VSC6048 |
|---|---|
| Manufacturer | Vitesse Semiconductor |
| File Size | 204.97 KB |
| Description | High-Speed Octal Programmable Timing Generator |
| Datasheet |
VSC6048_ETC.pdf
|
Reference Clock Selection Clock multiplication of x8 or x16 may be selected via the FSEL pin, requiring a reference clock of 100 ±2.5MHz or 50 ±1.25MHz, respectively.For system applications with 800MHz on board clock, the CMU can be bypassed by asserting BYP signal and RCK will accept an external 800MHz clock.In Bypass mode (BYP = 1, RCK = 800MHz) the skew from INX to RCK at the pin is 550ps +/-250ps.Table 1: Reference Clock Selection BYP 0 0 1 X = don’t care.FSEL 0 1 X RCK 100MHz 50MHz
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