W3EG6466S-BD4 Features
* DDR200, DDR266 and DDR333
* JEDEC design speciļ¬cations Double-data-rate architecture Bi-directional data strobes (DQS) Differential clock inputs (CK & CK#) Programmable Read Latency 2,2.5 (clock) Programmable Burst Length (2,4,8) Programmable Burst type (sequential & interleave) Edge aligned
W3EG6466S-AD4_WhiteElectronic.pdf
Datasheet Details
W3EG6466S-BD4, W3EG6466S-AD4
White Electronic
219.98 KB
512mb - 2x32mx64 ddr sdram unbuffered.
This datasheet PDF includes multiple part numbers: W3EG6466S-BD4, W3EG6466S-AD4.
Please refer to the document for exact specifications by model.
W3EG6466S-BD4 Distributor
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