PDSP16116MC Description
www.DataSheet4U.com PDSP16116/A/MC 16 by 16 Bit Complex Multiplier PDSP16116/A/MC DS3858 ISSUE 3.0 June 2000 The PDSP16116A will multiply two co.
16 bit input for real x data 16 bit input for imag x data 16 bit input for reaal y data 16 bit input for imag y data 16 bit output for real p data 16.
PDSP16116MC Features
* s s s s s s s s s s
Complex Number (16 + 16) X (16 + 16) Multiplication Full 32 bit Result 20MHz Clock Rate Block Floating Point FFT Butterfly Support -1 times -1 Trap Two's Complement Fractional Arithmetic TTL Compatible I/O Complex Conjugation 2 Cycle Fall Through 144 pin PGA or QFP packages
MU
PDSP16116MC Applications
* In combination with a PDSP16318, the PDSP16116A forms a two chip 10MHz Complex Multiplier Accumulator with 20 bit accumulator registers and output shifters. The PDSP16116 in combination with two PDSP16318s and two PDSP1601s forms a complete 10MHz Radix 2 DIT FFT Butterfly solution which fully suppo
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