PDSP16256 Datasheet (Zarlink Semiconductor)

PDSP16256, Programmable FIR Filter

The PDSP16256 contains sixteen multiplier accumulators, which can be multi cycled to provide from 16 to 128 stages of digital filtering.

Input data and coefficients are both represented by 16-bit two’s complement numbers with coefficients converted internally to 12 bits and the results being accumul

PDSP16256 Features

* q q q Ordering Information Commercial (0°C to +70°C) PDSP16256A/C0/AC 25MHz, PGA package Industrial (-40°C to +85°C) PDSP16256 B0/AC 20MHz, PGA package PDSP16256 B0/GC 20MHz, QFP package Military (-55°C to +125°C) PDSP16256 MC/AC1R 20MHz, MIL-STD-883

* (latest revision), PGA package PDSP16256 MC