54AC11238 - 3-Line to 8-Line Decoders/Demultiplecers
Y0 5 17 G2B The ′AC11238 circuit is designed to be used in high-performance memory-decoding or data-routing applications requiring very short NC 6 16 NC Y1 7 15 Y7 Y2 8 14 Y6 9 10 11 12 13 propagation delay times.
In high-performance Y3 GND NC Y4 Y5 memory systems, this decoder can be u
ą 54AC11238, 74AC11238 3ĆLINE TO 8ĆLINE DECODERS/DEMULTIPLEXERS ą SCAS039A APRIL 1988 REVISED APRIL 1993 Designed Specifically for High-Speed 54AC11238 .
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J PACKAGE Memory Decoders and Data Transmission 74AC11238 .
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D OR N PACKAGE Systems (TOP VIEW) Noninverting Version of ′AC11138 Incorporates 3 Enable Inputs to Simplify Cascading and/or Data Reception Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC
