54ACT16657 - 16-BIT TRANSCEIVERS
The ’ACT16657 contain two noninverting octal transceiver sections with separate parity generator/checker circuits and control signals.
For either section, the transmit/receive (1T/R or 2T/R) input determines the direction of data flow.
When 1T/R (or 2T/R) is high, data flows from the 1A (or 2A) port
54ACT16657, 74ACT16657 16-BIT TRANSCEIVERS WITH PARITY GENERATORS/CHECKERS AND 3-STATE OUTPUTS SCAS164A JANUARY 1991 REVISED APRIL 1996 D Members of the Texas Instruments Widebus™ Family D Inputs Are TTL-Voltage Compatible D Flow-Through Architecture Optimizes PCB Layout D Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise D EPIC™ (Enhanced-Performance Implanted CMOS) 1-µm Process D 500-mA Typical Latch-Up Immunity at 125°C D Package Options Inclu
