ą 54AC11238, 74AC11238 3ĆLINE TO 8ĆLINE DECODERS/DEMULTIPLEXERS ą SCAS039A APRIL 1988 REVISED APRIL 1993 Designed Specifically for High-Speed 54AC11238 .
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J PACKAGE Memory Decoders and Data Transmission 74AC11238 .
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D OR N PACKAGE Systems (TOP VIEW) Noninverting Version of ′AC11138 Incorporates 3 Enable Inputs to Simplify Cascading and/or Data Reception Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC
