74F10
908.38kb
Triple 3-input positive-nand gate. These devices contain three independent 3-input NAND gates. They perform the Boolean functions Y = A
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74F10 - Triple 3-input NAND gate
(NXP)
INTEGRATED CIRCUITS
74F10 Triple 3-input NAND gate 74F11 Triple 3-input AND gate
Product specification IC15 Data Handbook 1989 Sep 20
Philips Semico.
74F10 - Triple 3-Input NAND Gate
(Fairchild Semiconductor)
74F10 Triple 3-Input NAND Gate
April 1988 Revised July 1999
74F10 Triple 3-Input NAND Gate
General Description
This device contains three independen.
74F10 - Triple 3-Input NAND Gate
(National Semiconductor)
54F 74F10 Triple 3-Input NAND Gate
December 1994
54F 74F10 Triple 3-Input NAND Gate
General Description
This device contains three independent gates.
74F1056 - 8-Bit Schottky Barrier Diode Array
(Fairchild Semiconductor)
74F1056 8-Bit Schottky Barrier Diode Array
December 1993 Revised August 1999
74F1056 8-Bit Schottky Barrier Diode Array
General Description
The 74F1.
74F1071 - 18-Bit Undershoot/Overshoot Clamp
(Fairchild Semiconductor)
74F1071 18-Bit Undershoot/Overshoot Clamp
October 1994 Revised August 1999
74F1071 18-Bit Undershoot/Overshoot Clamp and ESD Protection Device
Gener.
74F109 - Dual JK Positive Edge-Triggered Flip-Flop
(National Semiconductor)
54F/74F109
54F/74F109 Dual JK Positive Edge-Triggered Flip-Flop
November 1994
54F/74F109 Dual JK Positive Edge-Triggered Flip-Flop
General Descript.
74F109 - Positive J-K positive edge-triggered flip-flops
(NXP)
INTEGRATED CIRCUITS
74F109 Positive J-K positive edge-triggered flip-flops
Product specification IC15 Data Handbook 1990 Oct 23
Philips Semiconducto.
74F109 - Dual JK Positive Edge-Triggered Flip-Flop
(Fairchild Semiconductor)
74F109 Dual JK Positive Edge-Triggered Flip-Flop
April 1988 Revised November 1999
74F109 Dual JK Positive Edge-Triggered Flip-Flop
General Descripti.
74F109 - DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOP
(Texas Instruments)
SN54F109, SN74F109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS
WITH CLEAR AND PRESET
SDFS047A – MARCH 1987 – REVISED OCTOBER 1993
• Package Options I.
74F11 - Triple 3-Input AND Gate
(National Semiconductor)
74F11 Triple 3-Input AND Gate
April 1988 Revised September 2000
74F11 Triple 3-Input AND Gate
General Description
This device contains three indepen.