Description
CD4021B-Q1 www.ti.com CMOS 8-STAGE STATIC SHIFT REGISTER Check for Samples: CD4021B-Q1 SCHS378 * MARCH 2010 .
of 'B' Series CMOS Devices".
Latch-Up Performance Meets 50 mA per JESD 78, Class I
APPLICATIONS.
Parallel Input/Serial Output Data Q.
Applications
* Medium-Speed Operation: 12-MHz (Typ) Clock
Rate at VDD
* VSS = 10 V
* Fully Static Operation
* Eight Master-Slave Flip-Flops Plus Output
Buffering and Control Gating
* 100% Tested for Quiescent Current at 20 V
* Maximum Input Current of 1 µA at 18 V
