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CD54HC4015 - Dual 4-Stage Static Shift Register

CD54HC4015 Description

CD54HC4015, CD74HC4015 Data sheet acquired from Harris Semiconductor SCHS198C November 1997 - Revised May 2003 High Speed CMOS Logic Dual 4-Stage St.
Maximum Frequency, Typically 60MHz CL = 15pF, VCC = 5V, TA = 25oC. Positive-Edge Clocking. Overriding Reset. Buf.

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Dual 4-Stage Static Shift Register Texas Instruments
Texas Instruments CD54HC4015-like datasheet