* Description
* Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times
* Asynchronous Set and Reset
* Complementary Outputs
* Buffered Inputs
* TTAyp=ic2a5lofCMAX = 50MHz at VCC = 5V, CL = 15pF,
* Fanout (Over Te
CD54HCT74 Datasheet (976.00 KB)
CD54HCT74
976.00 KB
Dual d flip-flop.
Data sheet acquired from Harris Semiconductor SCHS124D
January 1998 - Revised September 2003
CD54HC74, CD74HC74, CD54HCT74, CD74HCT74
Dual D Flip-Flo.
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