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CDCLVD2102 Dual 1:2 Low Additive Jitter LVDS Buffer

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Description

CDCLVD2102 www.ti.com SCAS904A * MAY 2010 * REVISED JUNE 2010 Dual 1:2 Low Additive Jitter LVDS Buffer Check for Samples: CDCLVD2102.
The CDCLVD2102 clock buffer distributes two clock inputs (IN0, IN1) to a total of 4 pairs of differential LVDS clock outputs (OUT0, OUT3).

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Features

* 1
* Dual 1:2 Differential Buffer
* Low Additive Jitter

Applications

* Telecommunications/Networking
* Medical Imaging
* Test and Measurement Equipment
* Wireless Communications

CDCLVD2102 Distributors

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