CDCU877 - 1.8-V PHASE LOCK LOOP CLOCK DRIVER
The CDCU877 is a high-performance, low-jitter, low-skew, zero-delay buffer that distributes a differential clock input pair (CK, CK) to ten differential pairs of clock outputs (Yn, Yn) and to one differential pair of feedback clock outputs (FBOUT, FBOUT).
The clock outputs are controlled by the inpu
CDCU877 Features
* 1.8-V Phase Lock Loop Clock Driver for Double Data Rate (DDR II) Applications
* Spread Spectrum Clock Compatible
* Operating Frequency: 10 MHz to 400 MHz
* Low Current Consumption:
