Description
DS92LV0411, DS92LV0412 www.ti.com SNLS331B * MAY 2010 * REVISED APRIL 2013 DS92LV0411 / DS92LV0412 5 - 50 MHz Channel Link II Seria.
The DS92LV0411 (serializer) and DS92LV0412 (deserializer) chipset translates a Channel Link LVDS video interface (4 LVDS Data + LVDS Clock) into a hig.
Features
* 1
* 2 5-Channel (4 data + 1 clock) Channel Link LVDS Parallel Interface Supports 24-bit Data 3-bit Control at 5
* 50 MHz
* AC Coupled STP Interconnect up to 10 Meters in Length
* Integrated Serial CML Terminations
* AT
* SPEED BIST Mode and Status Pin
Applications
* that currently use the popular Channel Link or Channel Link style devices to seamlessly upgrade to an embedded clock interface to reduce interconnect cost or ease design challenges. The parallel LVDS interface also reduces FPGA I/O pins, board trace count and alleviates EMI issues, when compared to
