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SN54LV10A TRIPLE 3-INPUT POSITIVE-NAND GATE

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Description

SN54LV10A, SN74LV10A TRIPLE 3ĆINPUT POSITIVEĆNAND GATE D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP (Output Ground Bounce) <0.
ordering information These triple 3-input positive-NAND gates are designed for 2-V to 5.

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Applications

* using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. 2A 3 2 1 20 19 4 18 1Y NC 5 17 NC 2B 6 16 3C NC 7 15 NC 2C 8 14 3B 9 10 11 12 13 3Y NC
* No internal connection ORDERING INFORMATION TA P

SN54LV10A Distributors

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TRIPLE 3-INPUT POSITIVE-NAND GATE Texas Instruments
Texas Instruments SN54LV10A-like datasheet