SN54LV11A Datasheet - Texas Instruments

SN54LV11A TRIPLE 3-INPUT POSITIVE-AND GATES

ordering information These triple 3-input positive-AND gates are designed for 2-V to 5.5-V VCC operation. The ’LV11A devices perform the Boolean function Y + A * B * C or Y + A ) B ) C in positive logic. These devices are fully specified for partial-power-down applications using Ioff.

SN54LV11A, SN74LV11A TRIPLE 3ĆINPUT POSITIVEĆAND GATES D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C D Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C D Support Mixed-Mode Voltage Operation on All Ports D Ioff Supports Partial-Power-Down Mode Operation D Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II D ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) .

SN54LV11A Datasheet (967.56 KB)