SN74ACT1071 - 10-BIT BUS-TERMINATION ARRAY
This device is designed to terminate bus lines in CMOS systems.
The integrated low-impedance diodes clamp the voltage of undershoots and overshoots caused by line reflections and ensure signal integrity.
The device also contains a bus-hold function that consists of a CMOS-buffer stage with a high-re
Designed to Ensure Defined Voltage Levels on Floating Bus Lines in CMOS Systems Reduces Undershoot and Overshoot Caused By Line Reflections Repetitive Peak Forward Current .
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IFRM = 100 mA Inputs Are TTL-Voltage Compatible Low Power Consumption (Like CMOS) ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Center-Pin VCC and GND Configuration Minimizes High-Spe
