SN74ACT1073DW - 16-BIT BUS-TERMINATION ARRAY
ordering information This device is designed to terminate bus lines in CMOS systems.
The integrated low-impedance diodes clamp the voltage of undershoots and overshoots caused by line reflections and ensure signal integrity.
The device also contains a bus-hold function that consists of a CMOS-buffer
D Designed to Ensure Defined Voltage Levels on Floating Bus Lines in CMOS Systems D 4.5-V to 5.5-V VCC Operation D Inputs Accept Voltages to 5.5 V D Reduces Undershoot and Overshoot Caused By Line Reflections D Repetitive Peak Forward Current .
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IFRM = 100 mA D Inputs Are TTL-Voltage Compatible D Low Power Consumption (Like CMOS) D Center-Pin VCC and GND Configuration Minimizes High-Speed Switching Noise D ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 200
