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SN74AUP1G02 Low-Power Single 2-Input Positive-NOR Gate

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Description

Product Folder Sample & Buy Technical Documents Tools & Software Support & Community SN74AUP1G02 SCES568I * JUNE 2004 * REVISED S.
This single 2-input positive-NOR gate performs the Boolean function Y = A + B or Y = A × B in positive logic.

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Features

* 1 Available in the Ultra Small 0.64 mm2 Package (DPW) with 0.5-mm Pitch
* Low Static-Power Consumption (ICC = 0.9 μA Max)
* Low Dynamic-Power Consumption (Cpd = 4.3 pF Typ at 3.3 V)
* Low Input Capacitance (Ci = 1.5 pF Typ)
* Low Noise
* Overshoot and

Applications

* Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
* ESD Performance Tested Per JESD 22
* 2000-V Human-Body Model (A114-B, Class II)
* 1000-V Charged-Device Model (C101) Simplified Schematic 2 Applications
* ATCA Solutions
* Active Noise Canc

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