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SN74AUP1G08 Low-Power Single 2-Input Positive-AND Gate

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Description

SN74AUP1G08 SCES502Q * NOVEMBER 2003 * REVISED MARCH 2024 SN74AUP1G08 Low-Power Single 2-Input Positive-AND Gate 1 .
This single 2-input positive-AND gate is designed for 0. B or Y = A +B in posit.

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Features

* Available in the Ultra Small 0.64mm2 Package (DPW) With 0.5mm Pitch
* Low Static-Power Consumption: ICC = 0.9μA Maximum
* Low Dynamic-Power Consumption: Cpd = 4.3pF Typical at 3.3V
* Low Input Capacitance: Ci = 1.5pF Typical
* Low Noise: Overshoot and Unders

Applications

* Latch-Up Performance Exceeds 100mA Per JESD 78, Class II
* ESD Performance Tested Per JESD 22
* 2000V Human-Body Model (A114-B, Class II)
* 1000V Charged-Device Model (C101) A Y B Simplified Schematic 2 Applications
* ATCA Solutions
* Active Noise

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