SN74HC165-Q1 - 8-Bit Parallel-Load Shift Registers
ordering information The SN74HC165 is an 8-bit parallel-load shift register that, when clocked, shift the data toward a serial (QH) output.
Parallel-in access to each stage is provided by eight individual direct data (A *H) inputs that are enabled by a low level at the shift/load (SH/LD) inp
SN74HC165ĆQ1 8ĆBIT PARALLELĆLOAD SHIFT REGISTER D Qualified for Automotive Applications D ESD Protection Exceeds 1500 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) D Wide Operating Voltage Range of 2 V to 6 V D Outputs Can Drive Up To 10 LSTTL Loads D Low Power Consumption, 80-µA Max ICC D Typical tpd = 13 ns D ±4-mA Output Drive at 5 V D Low Input Current of 1 µA Max D Complementary Outputs D Direct Overriding Load (Data) Inputs D Gated Clock Inputs D Pa
SN74HC165-Q1 Features
* a clock-inhibit (CLK INH) function and a complementary serial (QH) output. Clocking is accomplished by a low-to-high transition of the clock (CLK) input while SH/LD is held high and CLK INH is held low. The functions of CLK and CLK INH are interchangeable. Since a low CLK and a low-to-high transitio
