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SN74S225 16 x 5 ASYNCHRONOUS FIRST-IN FIRST-OUT MEMORY

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Description

SN74S225 16 × 5 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY WITH 3-STATE OUTPUTS SDLS207B * SEPTEMBER 1976 * REVISED APRIL 1998 D Indepen.
This 80-bit active-element memory is a monolithic Schottky-clamped transistor-transistor logic (STTL) array organized as 16 words by 5 bits.

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Applications

* not requiring a gated clock control, best results are achieved by applying the clock input to one of the clocks while tying the other clock input high. D In applications needing a gated clock, the load clock (gate control) must be high for the FIFO to load on the next clock pulse. CLKA and CLKB can

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Texas Instruments SN74S225-like datasheet