TMS626812 Datasheet - Texas Instruments

TMS626812 SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORY

The TMS626812 is a high-speed 16 777 216-bit synchronous dynamic random access memory (SDRAM) device organized as two banks of 1 048 576 words with eight bits per word. All inputs and outputs of the TMS626812 series are compatible with the LVTTL interface. PIN NOMENCLATURE A0 * A10 Addres.

TMS626812 1048576 BY 8-BIT BY 2-BANK SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORY SMOS687A JULY 1996 REVISED APRIL 1997 D Organization . . . 1M × 8 × 2 Banks D 3.3-V Power Supply (± 10% Tolerance) D Two Banks for On-Chip Interleaving (Gapless Accesses) D High Bandwidth Up to 83-MHz Data Rates D CAS Latency Programmable to 2 or 3 Cycles From Column-Address Entry D Burst Sequence Programmable to Serial or Interleave D Burst Length Programmable to 1, 2, 4, or 8 D Chip Sele.

TMS626812 Datasheet (549.66 KB)